高隔离度模拟开关及阻抗计量应用研究

    Research on High Isolation Analog Switch and its Application in Impedance Metrology

    • 摘要: 提出了一种高隔离度CMOS模拟开关电路设计,用于改善传统模拟开关隔离度有限,机械簧片开关切换时间长等缺点,并将高隔离度模拟开关应用于高精度数字采样阻抗电桥,解决电桥系统采样通道信号切换速度慢、信号泄漏影响矢量电压比率精度的难题。设计的模拟开关结构能够简化数字电桥系统,而且宽频范围内关断隔离度理论值、开关切换速度远优于传统模拟开关,在保证数字采样法阻抗高精度量值溯源前提下,提高阻抗校准速度,实用性强;采用的高精度双级电压跟随器电路用于减少模拟开关导通电阻对电桥桥路的影响。实验结果表明,提出的设计方案能够在1 kHz频率下使得数字采样阻抗电桥系统电压采集通道关断隔离度优于−140 dB,在100 Hz~100 kHz频率范围内实现快速、高精度的阻抗参量计量。

       

      Abstract: This paper proposes a high isolation CMOS analog switch circuit design aimed at ameliorating the limited isolation of traditional analog switches and the long switching time of mechanical reed switches. This high isolation analog switch is applied to a high-precision digital sampling impedance bridge, addressing issues of slow signal switching speed in bridge systems and signal leakage affecting the accuracy of vector voltage ratios. The proposed analog switch design simplifies the digital bridge system, providing superior off-isolation and switching speed across a broad frequency range compared to traditional analog switches. This ensures the high-precision traceability of impedance measurements using the digital sampling method while increasing the speed of impedance calibration, hence improving practicality. A high-precision dual-stage voltage follower circuit is also utilized to mitigate the impact of the on-resistance of the analog switch on the bridge circuit. Experimental results validate the proposed design, achieving an off-isolation better than -140 dB at 1 kHz and enabling rapid, high-precision impedance parameter measurements in the frequency range of 100 Hz to 100 kHz.

       

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